#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - SPICR0 is SPI control register 0."]
    pub spicr0: crate::Reg<spicr0::SPICR0_SPEC>,
    _reserved1: [u8; 2usize],
    #[doc = "0x04 - SPICR1 is SPI control register 1."]
    pub spicr1: crate::Reg<spicr1::SPICR1_SPEC>,
    _reserved2: [u8; 2usize],
    #[doc = "0x08 - SPIDR is the SPI TX/RX data register."]
    pub spidr: crate::Reg<spidr::SPIDR_SPEC>,
    _reserved3: [u8; 2usize],
    #[doc = "0x0c - SPISR is the SPI status register."]
    pub spisr: crate::Reg<spisr::SPISR_SPEC>,
    _reserved4: [u8; 2usize],
    #[doc = "0x10 - SPICPSR is the SPI clock frequency division register.."]
    pub spicpsr: crate::Reg<spicpsr::SPICPSR_SPEC>,
    _reserved5: [u8; 2usize],
    #[doc = "0x14 - SPIIMSC is the SPI interrupt mask register."]
    pub spiimsc: crate::Reg<spiimsc::SPIIMSC_SPEC>,
    _reserved6: [u8; 2usize],
    #[doc = "0x18 - SPIRIS is the raw interrupt status register."]
    pub spiris: crate::Reg<spiris::SPIRIS_SPEC>,
    _reserved7: [u8; 2usize],
    #[doc = "0x1c - SPIMIS is the SPI masked interrupt status register."]
    pub spimis: crate::Reg<spimis::SPIMIS_SPEC>,
    _reserved8: [u8; 2usize],
    #[doc = "0x20 - SPIICR is the SPI interrupt clear register."]
    pub spiicr: crate::Reg<spiicr::SPIICR_SPEC>,
    _reserved9: [u8; 2usize],
    #[doc = "0x24 - SPIDMACR is an SPI DMA enable register."]
    pub spidmacr: crate::Reg<spidmacr::SPIDMACR_SPEC>,
    _reserved10: [u8; 2usize],
    #[doc = "0x28 - SPITXFIFOCR is the SPI TX FIFO control register."]
    pub spitxfifocr: crate::Reg<spitxfifocr::SPITXFIFOCR_SPEC>,
    _reserved11: [u8; 2usize],
    #[doc = "0x2c - SPIRXFIFOCR is the SPI RX FIFO control register."]
    pub spirxfifocr: crate::Reg<spirxfifocr::SPIRXFIFOCR_SPEC>,
}
#[doc = "SPICR0 register accessor: an alias for `Reg<SPICR0_SPEC>`"]
pub type SPICR0 = crate::Reg<spicr0::SPICR0_SPEC>;
#[doc = "SPICR0 is SPI control register 0."]
pub mod spicr0;
#[doc = "SPICR1 register accessor: an alias for `Reg<SPICR1_SPEC>`"]
pub type SPICR1 = crate::Reg<spicr1::SPICR1_SPEC>;
#[doc = "SPICR1 is SPI control register 1."]
pub mod spicr1;
#[doc = "SPIDR register accessor: an alias for `Reg<SPIDR_SPEC>`"]
pub type SPIDR = crate::Reg<spidr::SPIDR_SPEC>;
#[doc = "SPIDR is the SPI TX/RX data register."]
pub mod spidr;
#[doc = "SPISR register accessor: an alias for `Reg<SPISR_SPEC>`"]
pub type SPISR = crate::Reg<spisr::SPISR_SPEC>;
#[doc = "SPISR is the SPI status register."]
pub mod spisr;
#[doc = "SPICPSR register accessor: an alias for `Reg<SPICPSR_SPEC>`"]
pub type SPICPSR = crate::Reg<spicpsr::SPICPSR_SPEC>;
#[doc = "SPICPSR is the SPI clock frequency division register.."]
pub mod spicpsr;
#[doc = "SPIIMSC register accessor: an alias for `Reg<SPIIMSC_SPEC>`"]
pub type SPIIMSC = crate::Reg<spiimsc::SPIIMSC_SPEC>;
#[doc = "SPIIMSC is the SPI interrupt mask register."]
pub mod spiimsc;
#[doc = "SPIRIS register accessor: an alias for `Reg<SPIRIS_SPEC>`"]
pub type SPIRIS = crate::Reg<spiris::SPIRIS_SPEC>;
#[doc = "SPIRIS is the raw interrupt status register."]
pub mod spiris;
#[doc = "SPIMIS register accessor: an alias for `Reg<SPIMIS_SPEC>`"]
pub type SPIMIS = crate::Reg<spimis::SPIMIS_SPEC>;
#[doc = "SPIMIS is the SPI masked interrupt status register."]
pub mod spimis;
#[doc = "SPIICR register accessor: an alias for `Reg<SPIICR_SPEC>`"]
pub type SPIICR = crate::Reg<spiicr::SPIICR_SPEC>;
#[doc = "SPIICR is the SPI interrupt clear register."]
pub mod spiicr;
#[doc = "SPIDMACR register accessor: an alias for `Reg<SPIDMACR_SPEC>`"]
pub type SPIDMACR = crate::Reg<spidmacr::SPIDMACR_SPEC>;
#[doc = "SPIDMACR is an SPI DMA enable register."]
pub mod spidmacr;
#[doc = "SPITXFIFOCR register accessor: an alias for `Reg<SPITXFIFOCR_SPEC>`"]
pub type SPITXFIFOCR = crate::Reg<spitxfifocr::SPITXFIFOCR_SPEC>;
#[doc = "SPITXFIFOCR is the SPI TX FIFO control register."]
pub mod spitxfifocr;
#[doc = "SPIRXFIFOCR register accessor: an alias for `Reg<SPIRXFIFOCR_SPEC>`"]
pub type SPIRXFIFOCR = crate::Reg<spirxfifocr::SPIRXFIFOCR_SPEC>;
#[doc = "SPIRXFIFOCR is the SPI RX FIFO control register."]
pub mod spirxfifocr;
